| 摘要 |
PURPOSE:To monitor whether a clock distributed to a proessing unit is normal or not, by providing an F/F which is operated by synchronizing with the clock, on a clock distribution unit and the processing unit, and detecting the coincidence or dissidence of outputs of said F/Fs. CONSTITUTION:This clock monitoring system is capable of monitoring a clock even if the clock period is varied remarkably, and a processing unit 20 receives distribution of a clock from a clock distribution unit 10. A flip-flop FF1 and FF2 which are operated by synchronizing with a clock A and B are provided on the clock distribution unit 10 and the processing unit 20. The clock A is an output of a clock generating circuit 11, and the clock B is an output which has been made to pass through a clock phase adjusting circuit 21 of an operating register group 22, etc. for reinforcing the detection of an error. An output OT1 of said FF1 is compared with an output OT2 of the FF2 by an comparing circuit 12, and in the event of dissidence, an output is sent to an error register 13 and an error is informed. |
