发明名称 Cascade data acquisition and evaluation system - is controlled by microprocessor and uses two input module banks in expandable arrangement
摘要 <p>A cascadable microprocessor controlled system for acquisition and evaluation of digital measurement values is esp. applicable to statistical measurement in connection with data traffic situations in multiprocessor systems. It is a compact system controllable by microprocessor which can be expanded to posses a large number of inputs. A number of identical input modules (M1-M16) each has a number pref. 16, of inputs connected to measurement value valve inputs and an output which can cut as a measurement value source for a second bank of input modules providing inputs to an evaluating unit or measurement value memory in the form of a microcomputer with a constant sampling interval. The modules are interrogated using a conventional interrupt control arrangement involving mains and subsidiary cycle.</p>
申请公布号 DE3036858(A1) 申请公布日期 1982.05.19
申请号 DE19803036858 申请日期 1980.09.30
申请人 SIEMENS AG 发明人 FRICKE,GUENTER,DIPL.-ING.;JOST,MANFRED;KOBER,RUDOLF,DIPL.-ING.;TOMANN,STEFAN,DIPL.-ING.
分类号 G06F17/18;(IPC1-7):06F15/36;06F15/16 主分类号 G06F17/18
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