DATA PROCESSING APPARATUS HAVING OPCODE EXTENSION REGISTER

摘要

33. DATA PROCESSING APPARATUS HAVING OPCODE EXTENSION REGISTER A Central Processing Unit (CPU) includes a hardware op-code extending register (OER) for storing a code for programmable selection of optional CPU features which modify processor operations defined by the op-code in each instruction. A control section in the CPU decodes both the op-code of a current instruction and the code in the OER, effectively combining the two to form an extended op-code capable of defining a larger set of processor operations than the op-code carried in each instruction, The code in the OER is changed only when the CPU executes an instruction for transferring a new code into OER. Thus the code in OER can remain stationary over many instruction cycles. A CPU architecture having an OER permits the set of processor operations for the CPU to be expanded without increasing the instruction length. The advantages provided are reduced memory overhead for program storage and increased processing efficiency in data processing systems having a small word size.