发明名称 MEMORY ACCESS SYSTEM OF ELECTRONIC COMPUTER
摘要 PURPOSE:To shorten a memory access overhead time, by converting an address to a real memory address from a virtual memory address, until the address from a processing device is inputted after a memory device has received an access request. CONSTITUTION:A logical address is set to a logical address register 12 by an instruction M0 and a signal CLK1, and at the same time, a memory access request FF3 is set, and an access request is transferred 4 to a memory device. Subsequently, the logical address is inputted to an address converting device 6, and as a result, a real address is outputted. This real address is stored in a real address register 7 by an instruction M1 and the clock signal CLK1. The memory device which has received the access request signal 4 outputs an address request signal 8 when this request has been received. In this way, contents of the register 7 are outputted 10 through an AND gate 9, and the address is transferred to the memory device.
申请公布号 JPS5778692(A) 申请公布日期 1982.05.17
申请号 JP19800155511 申请日期 1980.11.04
申请人 HITACHI SEISAKUSHO KK 发明人 IKEDA KOUICHI;SAWAMOTO HIDEO
分类号 G06F12/10 主分类号 G06F12/10
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