发明名称 COMPLEMENTARY TYPE MOS INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce leaking currents even at shallow junction and to obtain excellent moisture resistance by selectively adding different impurites in a polycrystal Si layer under a metallic wiring layer. CONSTITUTION:The P type diffused layer 8 is obtained on an N type Si substrate. An N type diffused layer 10 is formed in a well 3, and an N channel MOSFET is obtained. Then a contact hole is provided on an interlayer insulating film 11, and a polycrystal layer 13, on the entire surface of which B is added, is grown. Thereafter, an Si oxide film 14 is provided so as to cover the P type MOSFET, and P diffusion is performed. Then the polycrystal Si layer is readily transformed into an N type 15. Then, the insulating layer is removed from the entire surface, Al 16 is evaporated, and selective patterning is performed. In this way, the P type MOSFET is constituted by the wiring layer of the polycrystal Si layer including Al and P type impurities, and the N type MOSFET is constituted by the polycrystal Si layer including Al and N type impurities. Therefore no trouble occurs at the connecting part of the source and drain parts.
申请公布号 JPS5775454(A) 申请公布日期 1982.05.12
申请号 JP19800151792 申请日期 1980.10.29
申请人 NIPPON DENKI KK 发明人 MISU KAZUHITO;INOUE TAIICHI
分类号 H01L21/8238;H01L27/092;H01L29/78 主分类号 H01L21/8238
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