发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To provide a satisfactory connecting hole in an MOS element having favorable yield with rough mask positioning by a method wherein formation of opening for the connecting hole in relation to a diffusion layer is performed on self- alignment bias utilizing the etching back technique. CONSTITUTION:After the normal MOS process is performed, an Si3N4 film 18 is accumulated on an SiO2 film 15, a resist mask 16 having a hole 16a is formed by the photo-engraving technique with precision of about 12mum. When the Si3N4 film 18 is etched next, the Si3N4 film 18 is remained at the neighborhood of the resist wall and at the step parts of a gate electrode 14, a field oxide film 12. When the SiO2 film 15 is etched making the remained film 18 as a mask, the self-alignment connecting hole 19 can be obtained. After then the resist mask 16, the Si3N4 films 18 are removed to complete the MOS element. By this constitution, the margins a, b of the hole are changed by the thickness of the films 15, 18, and by adding quantity of H atoms to etching gas in the etching opening treatment, and when those are selected properly, a and b can be made to about 1mum, and the highly precise window can be formed through rough mask positioning.
申请公布号 JPS5775425(A) 申请公布日期 1982.05.12
申请号 JP19800150994 申请日期 1980.10.28
申请人 TOKYO SHIBAURA DENKI KK 发明人 TAKADA TOMOJI
分类号 H01L21/3205;H01L21/28;H01L21/302;H01L21/3065 主分类号 H01L21/3205
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