发明名称 PEVENTING DEVICE FOR ERRONEOUS CONTROL OF CONTROLLER
摘要 PURPOSE:To prevent the erroneous control due to a fault of an input/output device, by carrying out all inputs and outputs with binary signals along with a number of input/output points, receiving the control command input at an internal logical memory and delivering the internal arithmetic result to the control device via an external output relay. CONSTITUTION:A control command input 2, if exists, is received at a control command input DI point 3 and supplied to a logical memory A. The memory A is set at logic ''1'' with the input 2 to drive the 1st control output DO point 4 and then to actuate the 1st control output relay 5. The state of the relay 5 is fetched into a DI point 6, and the coincidence and dissidence are always monitored by a comparison monitoring circuit D between the points 4 and 6. At the same time, a timer B is actuated by the logic ''1'' output of the memory A, and the counting is started for the lapse of time. When no fault arises at a constant comparison monitoring circuit E for the 2nd control output relay, a constant detecting circuit F for an application suppressing relay and a control machinery detecting circuit G respectively until the lapse of the time set at the timer B, no suppression signal H is delivered from an input/output fault deciding circuit H.
申请公布号 JPS5775303(A) 申请公布日期 1982.05.11
申请号 JP19800150848 申请日期 1980.10.29
申请人 NIPPON KOKUYU TETSUDO;HITACHI SEISAKUSHO KK 发明人 ITOU TAKESHI;TANIGUCHI KAZUTADA;TSUCHIKURA KOUICHI;WATANABE HIRONOBU;FUJII NORITOSHI
分类号 G05B9/02;(IPC1-7):05B9/02 主分类号 G05B9/02
代理机构 代理人
主权项
地址