| 摘要 |
PURPOSE:To make it more suitable for integration by reducing number of circuit composing elements, by issuing a predetermined frequency-dividing step output of a frequency dividing circuit in accordance with switch operation and changing the time indication. CONSTITUTION:When a switch 34 is connected to pluse side of a power source 35, an output of a D type FF37 becomes a high-level one, and a 60-cycle counter 27 which emits a 1-minute signal is reset. At the same time, and output of an AND gate 38 becomes a high-level one, and a frequency dividing circuit 25 is also reset. And then, when a switch 39 is connected to plus side of a power source 40, resetting of the circuit 25 is cancelled through the gate 38, a 1-second signal is put out from a frequency dividing step 33 through an OR circuit 42, and the time is corrected until the switch 39 is returned. When the switch 34 is returned in accordance with a time signal, etc. after making reset of the circuit 25 by returning of the switch 39, resets of the circuit 25 and the counter 27 are cancelled, and the regular time indication is executed. |
