| 摘要 |
<p>PURPOSE:To form an error operating circuit with slow elements by operating errors with the error operating circuit in every twice a horizontal scanning frequency. CONSTITUTION:A digital signal corresponding to a color burst signal inputted from a burst extracting circuit to an input terminal 40 is applied to one input terminal of an arithmetic logical unit (ALU) 42 thrugh a latch circuit 41. An output from the ALU42 is applied to an output terminal 44 through a shift register 43 and an output from the shift register 43 is applied to the other input terminal of the ALU 4. A burst flag pulse inputted from a synchronizing separation circuit to an input terminal 45 is divided into 1/2 frequency by a frequency divider 47 and applied to one input terminal of an exclusive OR circuit 48 and the addition/subtraction control terminal of the ALU42. A color subcarrier frequency pulse outputted from the synchronizing separation circuit is applied to the other input terminal of the exclusive OR circuit 48 through an input terminal 46. The latch circuit 41 latches a digital signal in every subcarrier.</p> |
