| 摘要 |
PURPOSE:To prevent the receiving device from recognizing erroneously an upper device which issues a processing request and becomes faulty as it is, by providing a counter which is reset at every change time of upper devices for supplying data to be processed and outputs a control signal. CONSTITUTION:A counter which counts the number of data RD1 and RD2 to be processed which are supplied to a receiving circuit 41 supplies a control signal CONT to an address register 46 and a character register 47 for every receiving of data to be processed. If an upper device 1 issues a processing request signal CD1 and becomes faulty as it is when the count value of a counter 45 is 2, the supply of RD1 is stopped, and RD2 is supplied to the receiving circuit 41. When a CD2 is issued, the counter 45 is reset through an OR gate 44 by the pulse from a differentiating circuit 43. As the result, the counter 45 counts only RD2, and thus, the supply source of data to be processed is not recognized erroneously. |
