| 摘要 |
PURPOSE:To prevent a breakdown voltage drop generated at an overlapping section by obviating substantial overlap between the first gate region and a drain region and forming a gate oxide film in the same length as the first gate region. CONSTITUTION:An N<+> type source region 2 and the drain region 3 are shaped to a P type semiconductor layer 1, and a channel region 8 is formed between both regions and the first gate region 10 on the channel region. Here, the first gate region 10 is under a condition that it contacts with the source region 2 and the drain region 3, and is shaped so as not to substantially overlap on both regions. The gate oxide film 4b is molded in the same length as the first gate region 10. Accordingly, the breakdown voltage drop inevitably generated where the first gate region and the drain region overlap can be prevented. |
