发明名称 VARIABLE GAIN EQUALIZER CIRCUIT
摘要 PURPOSE:To eliminate the distortion generated in a three-terminal variable resistance and to make the gain variable, by grounding the middle point of this resistance through a resistance and providing a circuit, which converts an input signal to a current, in one rest terminal and providing a mirror circuit, which generates the same current, in the other terminal. CONSTITUTION:The signal inputted to transistors TR1 and TR2 constituting a complementary emitter follower circuit is converted to a current i1 having a value proportional to the reciprocal of the sum between a resistance R3 connected to emitters and a resistance R4 in the side of one terminal of a tree-terminal variable resistance 7. The current i1 is outputted as a current i2, which has the same value as the current i1 and has the direction opposite to that of the current i1, from an output terminal B by inversion current mirror circuits 5 and 6. The current i2 is outputted as a voltage proportional to an impedance element Z2 and a resistance R5. The current flowed to the variable resistance 7 can be ignored because it corresponds to the difference between currents i1 and i2, and distortion is not generated for the output.
申请公布号 JPS5772408(A) 申请公布日期 1982.05.06
申请号 JP19800148557 申请日期 1980.10.23
申请人 NIPPON VICTOR KK 发明人 FUJIWARA NOBUO
分类号 H04R3/00;H03G1/04;H03G3/12;H03H11/24 主分类号 H04R3/00
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