| 摘要 |
PURPOSE:To stop a sink current supply from a memory cell connected to a selective word line, by controlling a clamp level of a pair of selective and non-selective column lines, when writing to the memory cell of matrix array. CONSTITUTION:In case a word line W1, a column line B1, an anti-B1, etc. are selected and write to a memory cell Q11, etc. is executed, a write a data DA forms high and low level data D and an anti-D and an anti-D to the data DA being in a low level, etc. by a stopping circuit BPC, and controls transistors T11, T21. As a result, each on and off side of the cell Q11 selectd through a line B1 and an anti-B1 is clamped to a high level and a low level, respectively, a sink current from the off- side of the cell Q11 is executed as proxy by the transistor T21, the sink is stopped, and write is executed swiftly. On the other hand, a non-selective column line B2 and an anti-B2 are clamped to a high level through a stopping circuit CLC in the same way, a sink current is supplied from transistors T32, T42, and a cell Q12 supplies no sink current. |
