| 摘要 |
PURPOSE:To detect a fulat of address information without increasing the capacity of a storage device, by inputting an address parity bit to a check bit generating circuit and a syndrome generating circuit, respectively. CONSTITUTION:A write-in data and an address parity bit are inputted to a check bit generating circuit 4, and a check bit is generated from the circuit 4. The data and the check bit are written in a storage device 1. The data bit, the check bit and a parity bit of a readout address, which have been read out from the device 1 are inputted to a syndrome generating circuit 5. A generated syndrome is inputted to a syndrome generating circuit 5. A generated syndrome is inputted to a syndrome generating circuit 5. A generated syndrome is inputted to a syndrome decoding circuit 6, and in the circuit 6, an error is decided. In case of an error which can be corrected, a correction position instructing information is sent out to a data correction circuit 7 from the circuit 6, the circuit 7 corrects a data in accordance with this informatuon, and sends it out to a data line 11. In this way, it is decided by the syndrome pattern that the address line is faulty. |
