| 摘要 |
<p>The circuit provides synchronising and blanking signals. A first counter receives clock return-line pulses and is coupled to a window generator controlling a first JK switch whose output connects with a validation or count circuit of the synchronising pulses separated from the composite video signal. Output pulses of the count circuit are fed to one of its inputs and also to zero resetting input of the JK switch and first counter as well as the control input of a pulse forming circuit for the synchronising and blanking signals, to close the window. The window generator applies to the switch a control pulse, following the first counter zero resetting, of a preset whole number of line periods less than the frame line number. The generator also applies to the count circuit a control pulse following a zero resetting of the first counter, of a preset whole number of line periods greater than the frame line number, to control zero resetting of the counter and switch, in the absence of synchronising pulses received by the count circuit, as well as the initiation of pulses from the pulse forming circuit.</p> |
