| 摘要 |
PURPOSE:To reduce the storage capacity of a control memory by providing more than one address generation means for one macroinstruction register and by using microinstruction address corresponding to macroinstructions. CONSTITUTION:When a macroinstruction M4 is set in an instruction register 1, the address of a common microinstruction S01 among an M4- an M6 is generated by the 1st address generating circuit and set in the 1st address register 31, and the address of an instruction S43 characteritics to the M4 is generated by the 2nd address generating circuit 22 and se in the 2nd address register 32. The S01 is read out of a control memory 5 and set in a microinstruction register 6, and while the address of an S02 is set in the register 31 by an address adding circuit 8, the S02 is set in the regiter 6. Similarly, an S43 and an S44 are set in the register through a switching circuit 4 while their addresses are set in the register 31. |
