| 摘要 |
PURPOSE:To execute the process with a programmable logic controller, by carrying out in parallel both a program formed by a scan-type instruction and a program formed by a process advance instruction. CONSTITUTION:In a program memory 1, the program is set by a scan-type instruction for program addresses O to (m), by a process advance instruction for the next program addresses m+1 to (n) and by a scan-type instruction for the subsequent program addresses n+1 to Z respectively. When this program is executed, a CPU5 checks a prescribed register and jumps up to a process advance instruction of address m+1 which is designated by the register. Then if the unsatisfaction of process advance is detected through an execution of the process advance instruction, the program address of the relevant instruction is stored in an input/output memory 4 and at the same time a jump is given to the program address up to n+1. Thereafter, the program is executed from an address m+1 after the execution done up to the address Z. |
