| 摘要 |
PURPOSE:To obtain a nonadjusting hystesis operating circuit by monitoring parallel outputs of up/down counters by two gates, and then by determining the operation or release point of a bistable circuit according to the combination of their gate outputs. CONSTITUTION:When an up/down control signal U/D has a ''1'' for count-up operation, up/down counter CNT1 and CNT2 count clock pulses; terminals Q12-Q24 are all held at ''1''s and outputs of gates G1 and G2, and G5 and G7 of a hysteresis operating circuit HYS go to ''1''s and ''0''s respectively to set a flip-flop FF, thereby sending an alarm ALM. When it goes down to a ''0'' for count-down operation, the output of the gate G7 is held at a ''1'' to apply a clock pulse to the counters, and the terminal Q21 is held at a ''0'', the output of the gate G2 at a ''0'', and the output of the gate G8 at a ''0'' through an inverter INV1 to reset the FF, thereby stopping the alarm ALM. Namely, interval bits between the start and stop of the ALM show the hysteresis width when analog amplitude is positive. |
