Dual phase-control loop horizontal deflection synchronizing circuit

摘要

A television horizontal deflection synchronizing system uses two phase-lock loops. A horizontal oscillator operating at a frequency greater than the horizontal frequency is counted and a bilevel signal near the horizontal frequency is generated. A first phase-lock loop having a relatively long time constant controls the oscillator to maintain the bilevel signal in frequency and phase synchronism with horizontal synchronizing signals. In order to compensate for load-dependent variations in the delay of the horizontal deflection stage, a second phase-lock loop is used. The second phase-lock loop includes a phase detector, one input of which is coupled to an output of the first phase-lock loop and a second input of which is coupled to the deflection circuit for responding to the retrace pulse for enabling the phase detector to produce a current of a first polarity when the bilevel signal has a first value and a current of a second polarity when the bilevel signal has a second value. A loop filter is coupled to an output of the phase detector for filtering the first and second polarity currents to form a control signal. A phase controllable source includes a control input coupled to the loop filter for producing horizontal-rate drive pulses at a time which makes the retrace pulses synchronous with the bilevel signal.