| 摘要 |
PURPOSE:To obtain a number of control information, by inserting a number of frame levels being symmetrical to a DC zero potential over consecutive plurality of symbols, every information symbol of transmission signals. CONSTITUTION:The speed of an input signal is quickened so that the frame bit in 3-bit is inserted at a time point h, the frame bit is inserted to a frame insertion circuit 12 at time point i, and converted into multi-value signal at an A/D conversion circuit 13 for transmission. In the frame bit, each channel CH is taken as combination of 1-1-1 and 0-0-0 normally, and the multi-value level is taken for synchronism as the combination of 8-8-8 and 1-1-1 to keep DC balance as a whole. Discrimination is made at a frame discrimination circuit 17 with a predetermined combination at the reception side and corresponded to the control information at the transmission side. Thus, a number of control information is obtained, allowing various controls at the transmission side for the reception side. |
