发明名称 LOGICAL CIRCUIT USING SCHOTTKY BARRIER TYPE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To obtain an inverter function having greater noise margin, by constituting a logical circuit with the 1st and 2nd Schottky barrier type field effect transistors, diodes connected to the source and a load resistor. CONSTITUTION:The drain of a Schottky barrier type field effect transistor (TR)11 is connected to a DC power supply 14 via a load resistor 13, the source is to ground via a diode D15 and the gate is to an input terminal 18, repectively. The drain of the TR11 is connected to the gate of a TR12 of the same type as the TR11, the drain of the TR12 is to the power supply 14 and the source is ground via a D16 and a load resistor 17, respectively. An output terminal 19 is led from the connnection point of the D16 and a resistor 17. When a signal V1 at a terminal 18 is at low level, the TR11 is turned off and the TR12 turns on, and an output signal V2 is at high level. When the signal V2 is at high level, the TR11 turns on and the TR12 turns off, and the signal V2 is at low level. Since the TRs 11, 12 are grounded via Ds 15, 16, the amplitude of logic can be taken larger and the noise margin is also increased.
申请公布号 JPS5768932(A) 申请公布日期 1982.04.27
申请号 JP19800145032 申请日期 1980.10.15
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 YAMAMOTO KAZUNORI
分类号 H03K19/08;H03K19/0952 主分类号 H03K19/08
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