发明名称
摘要 A relational break signal generating device including two relational comparators (10) and (12) which independently compare an address input from a microprocessor to reference addresses previously input thereto and generate output signals which are fed into a combinational logic circuit (14) that produces false and break signals when a prespecified relationship between the input program address and the two reference addresses occurs. The device also includes a circuit (16) for generating pulses each time a break point is detected.
申请公布号 JPS57500714(A) 申请公布日期 1982.04.22
申请号 JP19810500275 申请日期 1980.04.22
申请人 发明人
分类号 G06F11/16;G06F11/28;G06F11/36 主分类号 G06F11/16
代理机构 代理人
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