发明名称 DIGITAL ARITHMETIC CIRCUIT
摘要 PURPOSE:To obtain a high degree of interpolation value through a simple constitution of arithmetic circuit, by dividing N times the residue obtained by giving a 1/N division to a numerical value B and then adding and subtracting the residue to and from the result obtained by giving an addition/subtraction of the quotient to and from a numerical value A. CONSTITUTION:The 1st data of an RAMI is fed into a register 4, and the next data is supplied to a 2-bit shifter 3. Then upper 2 bits are supplied to a register 5; and the upper one of the lower 2 bits is defined as (a) with the lower one diefined as (b) respectively. These bits (a) and (b) are set to a register 7. On the other hand, the data stored in the registers 4 and 5 are added to each other at an adder 8, and the 1st interpolation value is set at a register 6. The next interpolation value is set at the register 4, and the contents of the register 6 is shifted with the contents of the register 5 kept it is. Then an addition is carried out 4 times. After this, the next data of the RAMI is put into the register 5 to perform the same operation. The carry of the addition is selected by a multiplexer 9 so that the value (a), (b) and O are supplied for twice of 4 times and the rest one time respectively.
申请公布号 JPS5764864(A) 申请公布日期 1982.04.20
申请号 JP19800141050 申请日期 1980.10.08
申请人 NIPPON DENKI KK 发明人 ISHIZUKA HISAO
分类号 G05B15/02;G06F7/544;G06F17/17 主分类号 G05B15/02
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