| 摘要 |
PURPOSE:To obtain a P-N junction FET which has a short gate length by suppressing a lateral impurity dispersion to the same degree as a dispersion along a depth direction on formation of a P-N junction type gate. CONSTITUTION:After applying a resist mask 6 on an SiO2 5 which covers a GaAs wafer cut into mesa an opening is formed on it, and a Zn-doped P type polycrystalline GaAs 21 is laminated next to an N type GaAs active layer 3. A resist mask 22 is applied, layer 21 and an SiO2 film 5 is selectively etched away successively, and the mask is removed. Next by a gate junction formed by diffusion of an active layer 3-Zn from a polycrystalline layer 21 through heat-treatment applied after covering with a resist mask 23 except a gate region and the SiO2 film 5 on the N type layer 3 is removed by etching again dispersion of Zn toward a lateral direction is suppressed to a degree toward depth direction. Next an AuGe/Ni electrode 24 is attached utilizing the layer 21 as a mask, by heat-treatment after removal by etching of the SiO2 film 5 on a high resistance GaAs 2 and a polycrystalline GaAs 21 positioned on the former an ohmic electrode 25 is obtained, and a P-N junction gate type FET of a short gate length is completed. |
