发明名称 LOGICAL CIRCUIT USING GATE JUNCTION TYPE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To make a logical circuit high-density, by using a normally off-type junction gate field effect transistor as a load of a normally off-type junction gate field effect transistor for logic and by providing a junction diode between the gate and the source of the transistor as a load. CONSTITUTION:N channel normally off-type GaAsMESFETs 10 and 40 for logical operation and load which constitute an NOT circuit are cascaded, and a GaAs Schottky junction diode 50 is connected in the same rectifying direction as gate and source electrodes of the MESFET for load. When a voltage Vl between the drain and the source of the load is minute, the channel is closed by a gate depletion layer and a load current Il is not flowed; but when the voltage Vl is increased, the current Il starts flowing; and when the voltage Vl is increased furthermore, the gate electrode becomes high, but the gate potential becomes a voltage higher by the forward voltage (Vfd) of the diode due to action of the diode 50, and the MESFET for load is biased fixedly to Vfd, and the Il shows a saturation characteristic. This load characteristic is changed optionally by the ratio of gate width of MESFETs.
申请公布号 JPS5762632(A) 申请公布日期 1982.04.15
申请号 JP19800138030 申请日期 1980.10.02
申请人 NIPPON DENKI KK 发明人 KOZUKA MICHI
分类号 H03K19/0952 主分类号 H03K19/0952
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