发明名称 PULSE COUNTER
摘要 PURPOSE:To largely reduce the number of elements to be used, by commonly using an adder which operates as a counter, an RAM, a buffer for reading and buffer for presetting. CONSTITUTION:When an edge of a pulse signal is detected by an edge detection circuit 111, writing on the prescribed address of an RAM14 is performed by adding 1 to the already written integrated value on the prescribed address of the RAM14. Then, the number of pulse signals corresponding to the integrated value which is desired to read is designated to a control circuit 15. The address of the RAM14 corresponding to the number is designated in the control circuit 15. From the RAM14, the integrated value stored on the address is read out and is transmitted to a buffer 16 for reading with time division of timing which does not select pulse signals. After that, the value is sent to an operational section 18.
申请公布号 JPS5761337(A) 申请公布日期 1982.04.13
申请号 JP19800136572 申请日期 1980.09.30
申请人 TOKYO SHIBAURA DENKI KK 发明人 CHIKUMA MAKOTO
分类号 H03K21/02;H03K21/00 主分类号 H03K21/02
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