发明名称 SYNCHRONIZING CIRCUIT
摘要 PURPOSE:To adjust automatically the delay time between the transmission system and the receiving system, by forecasting the phase difference between a transmission clock and a receiving clock and by transmitting a signal to be transmitted to the receiving side through the path of an optimum delay time on a basis of this forecasting. CONSTITUTION:A pilot signal generating circuit L1 which is operated by a transmission-side clock A is provided, and the pilot signal from this circuit L1 is applied to phase forecasting circuits L3 and L4 through transmission paths of phase difference forecasting circuit D1-G1-L3 and D1-D2-G2-L4 having different delay times respectively. These circuits L3 and L4 are operated by a receiving-side clock B, and their outputs are latched in a phase difference forecasting circuit L5 through an adjusting circuit G3 for signal transmission delay time by the clock B. The clock A is latched in a latch L2 for signal transmission, and the output of the latch L2 is applied to one of adjusting circuits G4 and G5 for signal transmission time, to which the output of the circuit L3 is inputted, directly and is applied to the other through a phase difference forecasting circuit D3, and outputs of circuits G4 and G5 are latched in a latch L6 for signal transmission by the clock B, thereby adjusting the delay time automatically.
申请公布号 JPS5760754(A) 申请公布日期 1982.04.12
申请号 JP19800133681 申请日期 1980.09.27
申请人 FUJITSU KK 发明人 SHIMIZU KAZUYUKI;ETSUNO MINORU
分类号 H04L7/06;H04L7/00;H04L7/04 主分类号 H04L7/06
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