发明名称 FREQUENCY DIVIDER TO GENERATE SIGNAL PROCESSING SIGNAL IN SIGNAL PROCESSOR OBJECTING PCM SIGNAL OF SIGNAL FORMAT IN ACCORDANCE WITH TV SIGNAL OF STANDARD TV SYSTEM
摘要 PURPOSE:To simplify the constitution of a signal processor, by switching the frequency dividing ratio of the 2nd frequency dividing circuits in cascade connection, and changing signals to the 1st frequency dividing circuit. CONSTITUTION:The 1st frequency dividing circuit DIV1 having 5:1 of the frequency dividing ratio, 2nd frequency dividing circuit DIV2 which can switch the frequency dividing ratio 6:1 and 5:1, and the 3rd frequency dividing circuit DIV3 having 6:1 of the frequency dividing ratio, are in cascade connection. The frequency dividing ratio of the DIV2 is switched with a selector switch SW and the signal applied to the DIV1 is changed, allowing to easily generate various signals required for the processing of PCM signals of the signal format in accordance with TV signals of the NTSC and PAL signal systems to simplify the constitution of the signal processor.
申请公布号 JPS5760507(A) 申请公布日期 1982.04.12
申请号 JP19800133827 申请日期 1980.09.26
申请人 NIPPON VICTOR KK;HITACHI SEISAKUSHO KK 发明人 UENO SHIYOUJI;TANAKA HIROMICHI;HOSHINO TAKASHI
分类号 G11B20/10;H03K23/64 主分类号 G11B20/10
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