发明名称 DATA TRANSFER CONTROL SYSTEM
摘要 PURPOSE:To increase a data transfer speed, by starting an input operation when a data buffer becomes empty, in case a data is sent out to a bus having a small capacity from a bus having a large capacity. CONSTITUTION:When a transfer on a system bus 2 is permitted, the second controlling circuit 11 outputs a signal 14 for informing it to the third controlling circuit 12, receives a signal 15 for informing that a data is on the system bus 2, from the controlling circuit 12, and decides data buffers 8, 9 to which a data is to be inputted, by said signal, and the data is inputted to said buffers. Also, when the data is sent out to a local bus 5 and a data is gone, its empty data buffer 8 or 9 is selected, and a data is inputted from the system bus 2. Accordingly, a data is freely transferred onto the local bus 5 from the other data buffer 8 or 9.
申请公布号 JPS5760436(A) 申请公布日期 1982.04.12
申请号 JP19800135192 申请日期 1980.09.30
申请人 TOKYO SHIBAURA DENKI KK 发明人 YAMAGAMI NOBUHIKO
分类号 G06F13/38;G06F5/06;G06F12/06;G06F13/40 主分类号 G06F13/38
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