发明名称 PROCEDEU PENTRU EVITAREA SUPRASOLICITARII MECANISMELOR DE RIDICAT SI CIRCUIT PENTRU REALIZAREA PROCEDEULUI
摘要 <p>The protection circuit produces an electrical signal proportional to the load and compares this signal with a first reference representing maximum load and with a second reference representing overloading. The differential time quotient of the signal is constructed and its value over the time required to reach the first reference is stored. When the loading reaches the second reference the instantaneous differential quotient at this time is compared with the stored quotient and an overloading alarm released when the instantaneous quotient is greater than a given fraction of the stored quotient. When the first reference is reached the quotient is stored with a value reduced by the given fraction (e.g. to 0.95 times).</p>
申请公布号 RO78207(A) 申请公布日期 1982.04.12
申请号 RO19800101230 申请日期 1980.05.27
申请人 EPITOGEPGYARTO VALLALAT,HU 发明人 AVAR,ZOLTAN,HU;SALAVECZ,LAJOS,HU;LENDVAI,ISTVAN,HU
分类号 B66C15/00;B66C23/90;(IPC1-7):60P7/16 主分类号 B66C15/00
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