| 摘要 |
PURPOSE:To ensure the stable holding for the information which is accumulated in a memory cell, by providing a clamping MOS transistor to a bit line. CONSTITUTION:MOS transistors (TR)Q9 and Q10 having the drain set at a positive power source VDD and the potential set at VSS are connected via the source to bit lines 4 and 5 of memory cell groups 1 and 2 which are formed with the MOSTRs and capacitors. For instance, when the line 4 is set at the negative potential by the capacitive coupling caused by the capacitance C1, the TRQ9 is turned on earlier since the threshold value of the TRQ9 is less than that of a TRQ4. etc. that form a memory cell. Accordingly the negative voltage of the line 4 is clamped by the threshold voltage of the TRQ9, and the TRQ4 is kept off. Thus the storage information accumulated in a capacitor C4 can be stably held. |
