发明名称 DATA TRANSFER SYSTEM
摘要 PURPOSE:To achieve high-speed processing by improving the data movement processing performance of a microcomputer by moving data under the control of a direct memory access controller through the intervention of a data register. CONSTITUTION:A direct memory access controller DMAC3 which has >=2 free transfer channels and a data register 8 wherein moving data is stored temporarily are provided. Prescribed parameters regarding data movement are set to the said free transfer channels from a CPU2, respectively and after CPU2 is placed in a hold state, the control over respective devices in a microcomputer, an and a bus, etc., is transferred to the DMA, thereby moving data under the control of the DMAC3 through the intervention of a data register 8.
申请公布号 JPS5759220(A) 申请公布日期 1982.04.09
申请号 JP19800134024 申请日期 1980.09.26
申请人 TOKYO SHIBAURA DENKI KK 发明人 ISHII TAKAYOSHI
分类号 G06F13/28 主分类号 G06F13/28
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