发明名称 BUFFER MEMORY CIRCUIT OF COMPUTER OUTPUT EQUIPMENT
摘要 PURPOSE:To enable a general purpose memory having large capacity to be used by providing a write-only count and a read-only counter, and by sending the output of the counters to the address terminal of a buffer memory through switching those outputs in writing-in operation and readout operation. CONSTITUTION:When data is transferred from a computer 1 to an output equipment such as a printer 2, the number of data sent from the computer 1 is counted by a write-only counter in a buffer memory circuit stored with those data, and the number of data read out from a memory 4 is counted by a write-only counter 6. Through a switching circuit 7, the output of the counter 5 is sent to the address assignment terminal of the memory 4 during writing-in operation, and that of the counter is sent during readout operation. Those outputs of the counters 5 and 6 are compared mutually by a comparator 17 and when both are coincident with each other (data in the last address is read out), those counters are cleared. As said buffer memory, a general purpose memory is made usable.
申请公布号 JPS5759242(A) 申请公布日期 1982.04.09
申请号 JP19800133883 申请日期 1980.09.26
申请人 NIPPON DENSHI KK 发明人 ASADA TOORU
分类号 G06F3/06;G06F5/10;G06F13/38;G11C7/00 主分类号 G06F3/06
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