发明名称 BUFFER CIRCUIT
摘要 PURPOSE:To improve the effciency of data transfer through enabiling data to be read out of a buffer while data is written in the buffer, by forming a data buffer circuit with connecting a front stage buffer and a rear buffer in series into doubled constitution. CONSTITUTION:A data buffer circuit is constitutes of a fron t stage buffer 11 and a rear stage buffer 12. When the rear stage buffer 12 is not in readout operation, data is transferred from the front stage buffer 11 to the rear stage buffer 12. At the point of time when the data of the front stage buffer 11 are all transferred to the rear stag buffer 12, a permission to write the next data is given to the front stage buffer 11 and a permission to readout data is given to the rear stage buffer 12. The addressing of the front stage buffer 11 is performed by a counter 13, and that of the rear stage buffer 12 by a counter 14. When the data of the front stage buffer 11 are all transferred to the rear stage buffer 12, a one-shot circuit 16 outputs an output pulse OP1.
申请公布号 JPS5759243(A) 申请公布日期 1982.04.09
申请号 JP19800134073 申请日期 1980.09.26
申请人 TOKYO SHIBAURA DENKI KK 发明人 KOUSAKA TAKASHI
分类号 G06F3/06;G06F5/06;G06F5/10;G06F13/38;H04L13/08 主分类号 G06F3/06
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