Zaehlschaltung,die entsprechend einem Binaercode gebildete Binaerzeichen liefert

摘要

1278154 Counters SIEMENS AG 24 June 1970 [25 June 1969] 30618/70 Heading G4A A binary counter R contains a multi-bit number and register P contains a corresponding parity bit wherein prior to each step of the counter the number passes to a test circuit DP which can supply a signal modifying the parity bit if this is due to change. Then the number is modified by the step and finally the modified number and the parity bit (modified or unmodified) are passed to a parity circuit PP for checking. The steps may be made subtractive using a modified test circuit and the counter used as an operand register for a digital computer. The counter may be a cascade counter.