发明名称 READ ONLY MEMORY CIRCUIT
摘要 <p>PURPOSE:To prevent a through current and malfunction from being generated, by preventing the lowering of potential due to the off-leak current of a line in a DROM circuit from being generated by two transistors TRs inserted between the bit line and a power source. CONSTITUTION:Since the TR 101 is turned ON and the TR 102 is turned ON when a pre-charge signal PG becomes inactive, the potential of a power source line 40 is supplied to the bit line 28. Consequently, the off-leak current I0 flows from the bit line 28, but, a current supplying capacity, by third and fourth TRs 101 and 102 exceeds remarkably the current I0, therefore, the potential of the bit line 28 is held at a logic 1 without being lowered less than that of the power source line 40, and no through current more than a leak current flows from an inverter 21.</p>
申请公布号 JPS63213198(A) 申请公布日期 1988.09.06
申请号 JP19870045716 申请日期 1987.02.27
申请人 NEC CORP 发明人 KANEKO TAKASHI
分类号 G11C17/18;G11C17/00 主分类号 G11C17/18
代理机构 代理人
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