| 摘要 |
PURPOSE:To automaically reset a counter in case when operation of the counter is abnormal, by always detecting the difference to two address counters by a subtracting circuit, and resetting the counter when its result has got out of a prescribed value. CONSTITUTION:An address of an RAM1 is obtained, for instance, by adding values of a write address counter 7 and a W-ROM4 for providing a write interleave, etc. with an adder 2. A write address clock 13 and a horizontal synchronizing signal fix the phase by a double vertical synchronizing period. As to a readout address clock 14, too, the phase is decided in the same way, and the number of clocks is both 490 pieces. Accordingly, subtraction results of addresses of the point A and A' become equal. Other parts are all the same. In this case, an abnormal state denotes that a difference between values of the address counters has exceeded the range of (a) or (b). A reset operation is always executed at this point through a reset synchronizing circuit 10. According to such constitution, when operation of the counter is abnormal, it is reset automatically. |
