| 摘要 |
<p>This invention provides improved non-volatile semiconductor memories which include a volatile latch circuit having data nodes (A, B) and first and second cross-coupled transistors (12, 14), at least one of the transistors has first and second control gates (30,46; 42, 56), a floating gate (24) and an enhanced conduction insulator (48) or dual electron injector structure disposed between the first control gate (30, 46) and the floating gate (24). The second control gate (42, 56) is connected to the storage node (A). A control voltage source (20, 22) is connected to the first control gate (30, 46) for transferring charge between the enhanced conduction insulator or dual electron injector structure (48) and the data node.</p> |
