发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To realize a high speed memory LSI capable of highly stable operation, by closely locating digit lines which are differentially detected each other. CONSTITUTION:Data lines D0, -D0 on which differential readout signals appear, provided closely in parallel, and a memory cell MC is connected only one cross point among cross points D0, -D0 and each word lines W, DW. In reading out a memory, the D0, -D0 are precharged to the same voltage, the said W is selected to readout a cell, and the DW is selected and a dummy cell DM connected to the -D0 not connected to the cell is read out at the same time and a differential voltage appeared on the D0,-D0 is differentially amplified with a preamplifer PA. The signal from the PA is applied to an amplifier MA via transistors Q0, -Q0 which turn on through the application of an address signal A, and common signal lines CD, -CD.
申请公布号 JPS5758296(A) 申请公布日期 1982.04.07
申请号 JP19810119063 申请日期 1981.07.31
申请人 HITACHI SEISAKUSHO KK 发明人 ITOU KIYOO
分类号 G11C11/417;G11C7/18;G11C11/401 主分类号 G11C11/417
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