发明名称 MEMORY ACCESS CONTROL SYSTEM
摘要 PURPOSE:To realize a parallel process of both the conversion of address and the control of conflict and to increase the speed of access, by selecting a memory bank through the bit part of an address which requires no change when a logic address is converted into a physical address. CONSTITUTION:A processor that gives an access to a memory send first the part including (b) and (c) of bit Nos. 22-28 which are necessary for decision of the memory bank to a memory access controller 7 when an access request is given for a memory. At the same time, a logic address is converted into a physical address through an address conversion control bat 5. This conversion of address given no effect at all to the selection of memory bank and is accordingly is carried out independently of the conflict control of the access.
申请公布号 JPS5757353(A) 申请公布日期 1982.04.06
申请号 JP19800131970 申请日期 1980.09.22
申请人 FUJITSU KK 发明人 TAMURA HIROSHI
分类号 G06F12/14;G01P21/00;G06F12/00;G06F12/06;G06F12/10;G06F17/16 主分类号 G06F12/14
代理机构 代理人
主权项
地址