发明名称 ADDRESS CONVERTING SYSTEM
摘要 PURPOSE:To reduce the time required for repealing process of an address conversion pair, by repealing all address converting information within a block with the repealing control information held by a piece of address converting information of an address converting buffer. CONSTITUTION:An address converting buffer ATB20 is divided into blocks 21-24 in accordance with the divided segments of a virtual memory. The address converting information concerning each segment of the virtual memory is stored in the corresponding blocks 21-24. If the repealing is indicated for an address conversion pair on the ATB20 and, for instance, if the state of the SSI bit stored in a latch 31 is ''0'', the V bits of all entries 201-204 within the block 21 are reset to repeal the address conversion pair of the block 21.
申请公布号 JPS5755581(A) 申请公布日期 1982.04.02
申请号 JP19800130445 申请日期 1980.09.19
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 KOHAMA HARUO
分类号 G06F12/10 主分类号 G06F12/10
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