| 摘要 |
A circuit for synchronizing the frequency and/or phase of an output frequency signal (f0) to a reference frequency signal (fref) is disclosed. A digitally controlled oscillator produces an output frequency signal which varies dependent upon an input digital signal which also is varied. A comparator means is coupled to the oscillator and the reference signal for determining the presence or absence of a frequency or phase difference between the output frequency signal and the reference frequency signal and generates a digital signal to the oscillator indicating whether the output frequency signal should be increased or decreased. In one embodiment, the comparator means comprises an up/down counter and the digitally controlled oscillator comprises a digital-to-analog converter (DAC) coupled to an oscillator circuit. The output of the oscillator circuit (f0) is fed back through a divide by N counter circuit. The most significant digit (MSB) of the counter is connected to the up/down terminal of the up/down counter. The reference frequency signal is connected to the clock terminal of the up/down counter and through gating circuitry to the clear terminal of the divide by N counter. The up/down counter determines whether the reference frequency signal or the output frequency signal occurs first and generates a digital signal to the DAC and oscillator which adjusts the oscillator either upward or downward until the divided down oscillator signal is in synchronization with the reference signal. |
