发明名称 SANPURU*HOORUDOKAIRO
摘要 PURPOSE:To increase the holding function as well as to obtain the sample holding circuit with which the generation of abnormal pulse can be prevented by a method wherein the irregularity of time lag and the like of switching operation is eliminated. CONSTITUTION:In the case when the imput voltage for the sampling at this time is higher than that of the previous sampling, a capacitor 20 discharges electricity, through the intermediary of a transistor 30, until the base potential 30 drops from the emitter potential of a transistor 4 to the level of the forward voltage between the base and emitter of the transistor 30. In other words, the emitter potential of the transistor 4 or thereabouts is applied to the capacitor 2 when the sampling is performed. The On and OFF operation for the sampling is performed by the transistor 30 and a holding voltage higher than the withstand voltage between the emitter and base can be applied. Also, as regards the withstand voltage, the voltage up to the one existing between a collector C1 and a base can be used, and the subject circuit can be put to practical use at a value of several tens volts, because the transistor 30 has a lateral construction.
申请公布号 JPS5754367(A) 申请公布日期 1982.03.31
申请号 JP19800129527 申请日期 1980.09.18
申请人 TOYO ELECTRONICS IND CORP 发明人 NISHIMURA KYOSHI
分类号 G11C27/02;H01L21/331;H01L21/822;H01L21/8222;H01L27/04;H01L27/06;H01L29/72;H01L29/73 主分类号 G11C27/02
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