发明名称 Digital data processor providing for monitoring, changing and loading of RAM instruction data
摘要 The internal states of one or more micro-code storing RAMs (random access memories) which control program flow in a digital data processor are made accessible for loading, changing or monitoring purposes using variable mode multi-bit shift register storage devices for the input-output register of each RAM. When the contents of a selected location in a RAM is to be monitored, changed or loaded, the data stored in the selected location is read into the RAM's input-output register and the interconnections of the corresponding storage devices are reconfigured to form a serial string along which the bits in the string are shifted to a monitoring unit for monitoring, diagnosing, changing and/or loading purposes and then returned, via the string, to their original locations in the RAM's input-output register. If changes are required, the changed bits returned to the RAM's input-output register are written into the selected location in the RAM before normal operations are resumed.
申请公布号 US4322812(A) 申请公布日期 1982.03.30
申请号 US19790085388 申请日期 1979.10.16
申请人 BURROUGHS CORPORATION 发明人 DAVIS, SHEILA G.;FRANKS, ROBERT E.
分类号 G11C29/00;G06F11/22;G06F11/267;G06F11/273;G06F11/30;G06F12/16;G11C29/32;G11C29/56;(IPC1-7):G06F9/22;G06F13/06 主分类号 G11C29/00
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