发明名称 A PCM signal processor.
摘要 <p>A PCM signal processor for decoding PCM signals modulated in interleaved order in a TV format signal is disclosed. The processor is provided with a de-interleave circuit (27) for putting interleaved PCM signals into their original order, an error correction circuit (28) for correcting errors of PCM audio signal data words using an error correction check word modulated in the TV format signal together with the PCM audio signal data words, a circuit (41) for delaying an error pointer signal as a block error detection signal of a data block of the interleaved PCM signals, which is detected using an error detection check word modulated in the TV format signal together with the PCM audio signal data words, so as to output plural error pointer signals each delayed differently by given blocks, the error pointer signals corresponding as regards their delay amounts to respective ones of the de-interleaved data words and error correction check word, a controller (34) for controlling an error correction operation of the error correction circuit using a signal referring to the error pointer signals output from the circuit for delaying an error pointer signal, and auxiliary error pointer generation means in the controller, for generating an auxiliary error pointer according to a syndrome word or error correction word produced by a combination of the de-interleaved words and applying the auxiliary error pointer to the error pointer delaying circuit.</p>
申请公布号 EP0048150(A1) 申请公布日期 1982.03.24
申请号 EP19810304191 申请日期 1981.09.14
申请人 TOKYO SHIBAURA DENKI KABUSHIKI KAISHA 发明人 KOJIMA, TADASHI C/O PATENT DIVISION
分类号 H03M13/00;G11B5/09;G11B20/18;H03M13/27;(IPC1-7):11B5/09 主分类号 H03M13/00
代理机构 代理人
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