发明名称 |
METHOD OF FORMING ELECTRIC CONTACT |
摘要 |
Electrical contacts to diffused regions in a semiconductor substrate are made by a process which reduces the space needed in memory or logic cell layouts. The contacts are made such that they overlap, but are insulated from, adjacent conductors. The contacts are formed in a manner which avoids shorting of the diffused junctions to adjacent structures without being limited by lithographic overlay tolerances. |
申请公布号 |
JPS5750441(A) |
申请公布日期 |
1982.03.24 |
申请号 |
JP19810103454 |
申请日期 |
1981.07.03 |
申请人 |
INTERN BUSINESS MACHINES CORP |
发明人 |
ROBAATO CHIYAARUZU DOTSUKAATEI;POORU RUISU GAABARINO |
分类号 |
H01L27/10;H01L21/28;H01L21/321;H01L21/60;H01L21/768;H01L21/8242;H01L27/108;H01L29/78 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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