Transistor logic output for reduced power consumption and increased speed during low to high transition

摘要

In a transistor logic output device the improvement comprising an active element discharging transistor coupled between the base of the pulldown element transistor and ground or low potential for actively controlling a route to ground or low potential for diverting and discharging so-called capacitive feedback Miller current generated during the low to high voltage transition at the output of the device resulting from base-collector junction capacitance in the pulldown element transistor. The invention includes capacitive coupling means coupled at the base of the active element discharging transistor to follow changes in voltage at the device output and capacitively feed back current during transistion from low to high potential at the device output for driving the base of the discharge transistor thereby providing a low impedance path to ground or low potential at the base of the pulldown element transistor for diverting and discharging capacitive Miller feedback current.