发明名称 |
Manufacturing method for semiconductor device |
摘要 |
A method for manufacturing semiconductor devices having a multi-layer wiring interconnection structure wherein a first interconnection wiring metal layer is formed on a semiconductor substrate followed by the formation of layers of silicon nitride on portions wherein patterns are to be placed and forming a layer of silicon oxide over the layer of silicon nitride. Selective portions of the silicon oxide layer are removed by lightly etching the layer to form recesses around the wiring portions of the metal layer. The silicon nitride layer is then removed and an insulating layer is formed on the surface from which the silicon nitride layer was removed. Through-holes are formed in predetermined portions of the insulating layer through which contact is made to a second wiring metal layer disposed over the insulating layer.
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申请公布号 |
US4321284(A) |
申请公布日期 |
1982.03.23 |
申请号 |
US19800110169 |
申请日期 |
1980.01.07 |
申请人 |
VLSI TECHNOLOGY RESEARCH ASSOCIATION |
发明人 |
YAKUSHIJI, HISAO |
分类号 |
H01L21/3205;H01L21/768;H01L23/532;(IPC1-7):H01L21/88 |
主分类号 |
H01L21/3205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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