| 摘要 |
PURPOSE:To effectively utilize a cell forming element by forming a C-MOS cell configuration of master slice type by the connection of facing PFET and NFET in plural number in series with each other and using facing pair gates except one pair as common gate. CONSTITUTION:P-channel FET and N-channel FET of, for example, Si gate configuration are connected by two (or three) in series with each other to be faced. In a pair faced with each other, its gates are independently used, in the other pairs, the gate is commonly used, contact parts to be connected to the electrode wire are provided at the position designated by solid circles, and a cell configuration of master slice type is prepared. Thus, C<2>MOS gates can be readily peroformed by the formation of C<2>MOS inverter without remaining the unsed element, for example, by two connected in series in the cell, thereby improving the integration of the various types of logic circuits. |
