| 摘要 |
<p>A synchronizing separator circuit used for a television receiver which has an amplitude separator circuit and a frequency separator circuit well adapted for simple construction and circuit integration. Since the amplitude separator circuit enhances the separating sensitivity for the vertical synchronizing signal, the input transistor of the amplitude separator circuit and the composite video signal are converted in impedance by an emitter follower circuit to produce an output for the input transistor, and a discharging circuit which conduits at least during the vertical synchronizing signal for the composite video signal is provided in parallel with the discharging resistor of the capacitor connected therebetween. The discharging circuit increases the amount of current flowing through the input transistor of the amplitude separator circuit during the vertical synchronizing signal, thereby increasing the separation sensitivity of the vertical synchronizing signal. </p> |
